In 2018, John Preskill gave a lecture coining a term that would define the next decade of quantum computing research: NISQ — Noisy Intermediate-Scale Quantum. The phrase captured something precise: the quantum processors coming online had more qubits than any classical computer could fully simulate, but far too much noise to implement the error-corrected algorithms that quantum computing theory promised. The intermediate scale was not an engineering accident; it was a physics constraint. And the noise was not a temporary imperfection; it was the defining challenge.
Seven years into the NISQ era, the honest assessment is more nuanced than either the optimists of 2018 or the sceptics predicted. NISQ devices have produced genuine scientific value — benchmark data on quantum hardware quality, demonstrations of quantum simulation for specific physical systems, and a rigorous empirical understanding of how noise propagates through circuits. They have also failed to demonstrate quantum advantage on any commercially relevant problem, and several of the most prominent “quantum supremacy” claims have been contested or superseded by improved classical algorithms.
Understanding why NISQ has the limitations it does requires understanding the physics of noise, the geometry of quantum circuits, and the mathematics of classical simulation. These are not separate problems — they are the same problem viewed from different angles.
Key Concepts in This Article
Circuit Fidelity
The probability that a circuit produces the correct output state. For a circuit with G two-qubit gates each failing with probability p, the total fidelity approximates (1−p)^G — decaying exponentially in gate count.
SWAP Overhead
The gate cost of routing a logical two-qubit operation between non-adjacent physical qubits on a constrained topology. One SWAP costs 3 CNOTs; routing a single long-range gate on a linear chain can require 10+ physical gates.
Classical Simulability Boundary
The frontier beyond which classical computers cannot efficiently simulate a quantum circuit. Defined by circuit size and entanglement structure — not just qubit count. The "NISQ advantage zone" is the narrow band where circuits exceed this threshold yet remain executable on noisy hardware.
Error Mitigation
Classical post-processing techniques — zero-noise extrapolation, probabilistic error cancellation, symmetry verification — that partially compensate for noise without correcting it. Unlike error correction, mitigation cannot suppress errors below the physical rate; it trades additional circuit shots for reduced bias.
The Gate Error Budget: Fidelity Decays Exponentially
The most fundamental limitation of NISQ computing is gate error. Every two-qubit gate — a CNOT, a CZ, an XX rotation — introduces a small but non-zero probability of error. On the best superconducting hardware today (IBM, Google), two-qubit gate error rates are approximately 0.1–0.3% per gate. On typical production hardware they are 0.3–0.8%. Trapped-ion systems achieve 0.1–0.5% with slower gates.
These error rates look small. They are not. Circuit fidelity — the probability that a circuit produces the correct output — decays as approximately (1−p)^G, where p is the two-qubit gate error and G is the total gate count. At p = 0.5% and G = 200 gates, the fidelity is (0.995)²⁰⁰ ≈ 0.37. More than half the probability mass is on incorrect states. At G = 500 gates, it is 0.08. The circuit is producing mostly noise.
This is not fixable by running the same circuit repeatedly — more shots give more statistical precision for a fixed expected output, but if the expected output is noise, more shots give more precise noise. The noise is systematic: it shifts the expected measurement outcomes, not just adds statistical variance.
The immediately useful depth limit — where fidelity remains high enough to extract a meaningful signal — is roughly 50–200 two-qubit gates for current hardware, depending on the error rate and the algorithm’s noise sensitivity. Shor’s algorithm for RSA-2048 needs ~10¹¹ two-qubit gates. Grover’s for a 128-bit key search needs ~10¹⁹. These are not in the same universe as NISQ capabilities.
Connectivity Constraints: The SWAP Overhead Tax
NISQ processors impose a second severe limitation: physical qubit connectivity. Most superconducting architectures (IBM’s heavy-hex, Google’s Sycamore grid) connect each qubit to only 2–3 neighbours. Long-range two-qubit gates between non-adjacent qubits are not natively available.
The routing problem is severe for algorithms that require all-to-all connectivity — exactly the algorithms most likely to demonstrate quantum advantage. The quantum Fourier transform, the heart of Shor’s algorithm, requires gates between every pair of qubits. On a linear chain of n qubits, the SWAP overhead multiplies the gate count by O(n). For n=100 and a circuit already at the noise threshold, this O(100) overhead is fatal.
NISQ-friendly algorithms — VQE, QAOA, quantum kernels — are specifically designed around the hardware’s native connectivity. Their circuits use only nearest-neighbour gates, trading algorithm optimality for hardware compatibility. This constraint is itself a limitation: the NISQ-optimised versions of algorithms may not be the most powerful versions.
Trapped-ion systems avoid this problem through all-to-all connectivity (via the shared motional mode) — but pay for it with slower gates (microseconds vs nanoseconds for superconducting) and a hard cap on simultaneous operations due to the shared phonon bus. Neutral atom arrays offer programmable connectivity via atom rearrangement, which is why they have emerged as a preferred platform for error correction demonstrations.
The Classical Simulability Boundary
The promise of NISQ computing rests on a specific claim: that there exist quantum circuits which are both too complex for classical computers to simulate and shallow enough to run reliably on noisy hardware. This “quantum advantage zone” must be wide enough to contain circuits that solve useful problems.
The classical simulability boundary is not a fixed line — it depends on the circuit structure, not just qubit count and depth. Several classical methods can efficiently simulate circuits that naive state vector simulation cannot:
Tensor network contraction: circuits with low entanglement (measurable as the Schmidt rank or bond dimension of the output state) can be contracted efficiently as matrix product states (MPS) or more general tensor networks. Shallow circuits with limited two-qubit gate layers often fall into this category.
Clifford simulation (Gottesman-Knill theorem): circuits consisting only of Clifford gates (H, CNOT, S, and their combinations) can be simulated in polynomial time on classical computers, regardless of qubit count. This eliminates a large class of circuits from the quantum advantage candidate pool.
Approximate classical simulation: for random circuits at moderate depth, classical tensor network algorithms can approximate the output distribution to an additive error that may be sufficient to match a quantum computer’s performance (given its own noise). This is precisely what happened to Google’s 2019 quantum supremacy claim: Pan and Zhang (2022) demonstrated that a classical algorithm running on a modern GPU cluster could simulate Sycamore-scale random circuits within the time originally claimed as quantum-exclusive, by exploiting the structure of the random circuit.
The NISQ advantage zone is narrower than it appeared in 2018. It may exist for specific physical simulation tasks — quantum chemistry near a phase transition, strongly correlated materials — where the physical structure of the problem matches the natural dynamics of a quantum processor. For general optimization and machine learning, the zone appears to close before reaching problems of practical interest.
Error Mitigation: The NISQ Workaround and Its Limits
Unable to correct errors without fault-tolerant circuits, the NISQ field developed a different approach: error mitigation — classical post-processing techniques that partially compensate for noise without the qubit overhead of error correction.
Zero-noise extrapolation (ZNE): run the same circuit at multiple noise levels (by intentionally amplifying noise through gate repetition or pulse stretching), then extrapolate the observed expectation value to the zero-noise limit. If the noise model is known and the noise level can be controlled, this extrapolation can recover the noiseless expectation value with reduced bias — at the cost of additional circuit executions.
Probabilistic error cancellation (PEC): represent the ideal noiseless operation as a linear combination of noisy operations, and sample from this decomposition. Averaging over many such samples gives an unbiased estimate of the ideal expectation value. The overhead is exponential in the noise rate: to achieve precision ε on an n-gate circuit with error rate p per gate, PEC requires O(e^(cn·p)/ε²) circuit samples — exponential in the number of gates.
Symmetry verification: many quantum systems have exact symmetries (particle number conservation, parity, etc.) that noisy circuits violate. Post-selecting on outcomes that respect the symmetry removes noise-corrupted shots at the cost of reduced effective sample size.
Dynamical decoupling: applying periodic π-pulses to idle qubits refocuses dephasing noise that accumulates during circuit idle times. This reduces T2-limited errors without modifying the logical gate sequence.
The honest assessment of error mitigation: it can reduce systematic bias at the cost of increased statistical uncertainty and exponentially more circuit executions. For circuits with O(100) gates at current noise levels, PEC overhead is already a factor of 10–100× in shot count. For circuits with O(1000) gates, the overhead is astronomical. Error mitigation does not close the gap between NISQ and fault-tolerant computing — it extends the useful range of shallow circuits by perhaps a factor of 2–5× in depth, not the orders of magnitude needed for practically useful algorithms.
The Quantum Advantage Record: An Honest Accounting
The history of NISQ quantum advantage claims is instructive.
Google Sycamore (2019): claimed quantum supremacy for random circuit sampling — generating samples from the output distribution of a 53-qubit, 20-cycle random circuit in 200 seconds, versus an estimated 10,000 years for classical simulation. Within three years, classical algorithms had reduced that estimate to weeks, then days. By 2022, approximate classical simulation methods could match Sycamore’s task within hours on a large GPU cluster. The claim was correct at the time of publication; the goalposts moved faster than expected.
Xanadu Borealis (2022): claimed quantum advantage for Gaussian boson sampling using 216 photonic modes. Classical simulation of exact GBS is believed to be hard, and the experiment was technically impressive. Critics noted that approximate classical simulation of noisy GBS — which is what the physical device actually performs — may be significantly easier, and that no classical-hard useful computation is performed.
IBM Utility-Scale (2023): demonstrated that a 127-qubit Eagle processor running a specific quantum simulation (kicked Ising model) with error mitigation produced results that disagreed with approximate classical simulation. This is a legitimate result, but the “classical simulation” used was itself approximate — exact classical simulation of 127 qubits is still intractable for that circuit depth, making the comparison complex.
None of these results demonstrates quantum advantage on a commercially or scientifically useful problem where classical methods are well-established and thoroughly optimised. Random circuit sampling and boson sampling are not themselves useful computations; they are benchmark tasks chosen specifically because classical simulation is hard. This is a valid scientific proof-of-principle but not the same as a practical speedup.
What NISQ Might Actually Be Useful For
The honest near-term use cases for NISQ computing are narrower than early optimism suggested but more substantive than complete scepticism implies.
Quantum simulation of quantum systems: simulating the time evolution of quantum Hamiltonians on a quantum processor is the most natural use of NISQ hardware. A superconducting processor naturally implements certain Ising-like interactions; a trapped-ion processor naturally implements long-range spin models. Simulating a quantum magnet on a quantum magnet requires only that the hardware dynamics approximate the target dynamics — not full algorithmic universality. This is where NISQ devices can plausibly exceed classical methods for specific physical systems, particularly at the boundary between tractable and intractable classical simulation.
Quantum chemistry at moderate system size: for molecules with 10–30 active electrons in 20–60 spin-orbitals, VQE with hardware-efficient ansätze and error mitigation may provide useful ground state energy estimates that compete with or complement classical methods like CCSD(T) for specific molecular geometries. This is a narrow window, but it is scientifically meaningful — nitrogen fixation catalysis, transition metal chemistry, and photosynthesis involve exactly these system sizes.
Quantum error correction demonstrations: NISQ hardware is the experimental platform for learning how to do error correction. Google’s below-threshold surface code demonstration (2023), QuEra’s 48-logical-qubit demonstration (2023), and IBM’s LDPC code experiments are all scientifically valuable independent of immediate utility — they establish the empirical error rates, decoders, and engineering challenges that will define fault-tolerant systems.
Quantum hardware benchmarking: NISQ processors have become precision instruments for measuring their own noise characteristics. Randomised benchmarking, cycle benchmarking, and tomography experiments reveal the noise models needed to design better error correction codes and mitigation strategies. This is a genuine scientific contribution even if no useful computation is performed.
The Barren Plateau Ceiling
The variational algorithms designed for NISQ — VQE, QAOA, quantum kernel SVMs — face a fundamental scaling problem discussed in depth in this series’ barren plateau post: as circuit depth and qubit count grow, the gradient of the objective function vanishes exponentially. The classical optimizer cannot navigate a landscape where every direction looks flat.
This creates a ceiling on the practical scale of variational algorithms independent of hardware noise. Even on a noise-free quantum computer, training a hardware-efficient VQE ansatz for a 100-qubit system faces gradient magnitudes of order 2⁻⁵⁰ — effectively zero. The algorithms that are NISQ-compatible in terms of circuit depth are not NISQ-scalable in terms of trainability. These are two separate constraints, and both bite simultaneously.
Mitigation strategies — local cost functions, ADAPT-VQE’s greedy ansatz construction, layerwise training — partially address this but do not eliminate it. A circuit that is shallow enough to run reliably and trainable enough to optimise is a circuit that is almost certainly shallow enough to simulate classically. The Venn diagram of “NISQ-executable,” “trainable,” and “classically hard” has a very small intersection.
The Path Out: Early Fault-Tolerant Computing
The emerging consensus in the field points toward a path that skips the NISQ optimism of 2018 and aims for early fault-tolerant (EFT) computing — systems with a small number of fully error-corrected logical qubits running deeper logical circuits than any NISQ device, even if the total qubit count and logical gate throughput are modest.
The key enablers of EFT are visible in current hardware:
- Superconducting gate fidelities at 99.5–99.8% are approaching the sub-threshold regime for surface code operation (threshold ~99.0–99.5% for realistic noise).
- LDPC codes (IBM’s gross code, bivariate bicycle codes) promise 10× better encoding efficiency than surface codes — fewer physical qubits per logical qubit.
- Neutral atom arrays with reconfigurable geometry can implement transversal logical gates directly, reducing T-factory overhead.
- Trapped-ion systems at 99.9% two-qubit fidelity are already below the fault-tolerant threshold by a significant margin.
The first EFT demonstrations — logical circuits outperforming physical circuits on the same hardware, for the same problem, without error mitigation — are likely within the next two to three years. When they arrive, they will not replace NISQ hardware; they will coexist with it, serving different problem classes, just as FPGAs and GPUs coexist with general-purpose CPUs.
NISQ is not a failure. It is the necessary experimental phase in which quantum hardware matured, error mitigation was invented and bounded, fault-tolerance thresholds were approached from below, and the community developed an honest understanding of where quantum algorithms can and cannot help. The algorithms that will run on fault-tolerant machines — Shor’s for cryptography, QPE for quantum chemistry, quantum walks for search — are not NISQ algorithms. They require coherence that NISQ cannot provide.
What NISQ demonstrated, definitively, is that quantum processors can be built, calibrated, and operated at scales where classical simulation is genuinely hard. Whether they can be made useful at that scale without error correction — the original NISQ promise — remains unproven. Whether fault-tolerant systems will inherit NISQ’s hardware progress and amplify it into practical advantage — that is the bet the field has collectively made, and the evidence is increasingly that it is a good one.
Sources & Further Reading
- Quantum Computing in the NISQ Era and Beyond. Quantum 2, 79; arXiv:1801.00862 (2018)
- Quantum Supremacy Using a Programmable Superconducting Processor. Nature 574, 505 (2019)
- Evidence for the Utility of Quantum Computing Before Fault Tolerance. Nature 618, 500 (2023)
- Quantum Error Correction Below the Surface Code Threshold. Nature 638, 920; arXiv:2408.13687 (2024)
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